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CSI to SPI Peripheral Communication in V850ES Microcontrollers

Figure 1. CSI Operation

Freq/2

- 2**6

Timer Output

TM50

SCK0

n_B

SCK0

n_B

SO0

SI0

Clock

Selector

Serial Clock Control

Clock Star/Stop Control

Clock Phase Control

Serial Clock Counter

Interrupt Control

INTCSI0

Transmission Control

Control SignalsTransmission Data Control

Initial Transmission

Buffer Register (

SOTBF

Selection

Transmission

Buffer Register (

SOTB

Shift Register

(

SIO0

Receive Buffer Register

(

SIRB

Latch

The second method of data transfer is to use the first edge of the serial clock as the data drive strobe and

the second edge for the data capture strobe. In this case, the first edge of the serial clock is used to

indicate start of transmission from the master unit.

For NEC Electronics MCUs, the Clock Selection Register, CSICn, specifies CSI transfer operation.

• CKPn selects clock polarity.

• DAPn specifies whether the first edge of the serial clock is data capture or data drive.

The slave unit, whether it is another MCU or a peripheral device such as a serial EEPROM, must provide

interface logic to support any one of the above type 1 through 4 clocking methods. The master unit must

be configured such that it can communicate with a certain type of clocking m

ethod used by the slave unit.

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