Directed Electronics VS102 Spezifikationen PDF herunterladen (Seite 44)

A-36

A LAUER driver

A4.4 Data transfer PCS 830.x I/O BUS

The PCS 830.3/31 uses for each channel (separately settable) 4

addresses respectively in the EZ/AZ area on the I/O bus. These addresses

have the following meaning (only for diagnosis purposes):

ADDRESS: base address +0

DIRECTION: writing (AZ)

-- presently not used

DIRECTION: reading (EZ)

-- presently not used

STATUS CHANNEL

ADDRESS: base address +1

DIRECTION: reading (EZ)

bit 7 = 1 (frame ready) - data interchange readiness!

bit 6 = 1 (fetch list) - cross-reference list transfer!

bit 5 = 1 (watchdog) - watchdog has been activated!

bit 4..0 presently not used

DIRECTION: writing (AZ)

-- reset during communication (software reset)

for exiting the menus (PCS 100)

DATA CHANNEL

ADDRESS: base address +2 and bass address +3 (word-by-word)

DIRECTION: reading (EZ) and writing (AZ)

COMMANDS PCS -> prog. contr.

DATA PCS <-> prog. contr.

The data transfer is managed by the enclosed PCSKOMM PB, so no

evaluation is required by the user. The indicated meanings are only rele-

vant for diagnosis purposes. However, attention must be paid that the

user program never accesses the base addresses +2, +3 of the corres-

ponding channel. Otherwise, correct communication between the PCS

operating console and the PCS 830.3/31 is not guaranteed anymore.

Consequences are e.g. stop of the programmable controller, corruption

of the programmable controller program and data.

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Directed Electronics VS102 Spezifikationen Seite 44